CLUSTERATLAS
A field guide to supercomputing

Tuolumne

DOE/NNSA/LLNL

CPU Accelerator Interconnect
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Tuolumne node architecture

Tuolumne is operated by DOE/NNSA/LLNL in United States. This profile covers Ranked system / partition.

Cluster interconnect: Slingshot-11. Topology: Not verified.

MI300A compute

Node count
1144
CPU
AMD Zen 4 · 24 cores per MI300A
CPUs per node
4
Accelerator
AMD MI300A
Physical accelerators per node
4
Host / unified memory
512 GB unified HBM3 per node
Accelerator memory
128 GB shared CPU/GPU memory per APU
Local accelerator links
Infinity Fabric
CPU-to-accelerator link
Infinity Fabric
Storage
Not verified

Scope and uncertainty

1,144 compute nodes (1,100 batch + 44 debug); the published 1,152 total includes eight login nodes. CPU cores and GPU share memory within each MI300A; unified memory is not an additional separate RAM allocation.

Not verified means a detail has not been confirmed in this catalog. Diagrams are schematic; node indices are illustrative, not physical hostnames. Data checked 14 September 2026.

Sources

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Data & sources